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Cross sectional schematics of the MOSFET
and the IGBT device. |
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| The n-epi resistivity sets the on-state resistance,
RDS(on), and the breakdown voltage of the MOSFET, given by following
relationship |
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| To increase the breakdown voltage of the MOSFET,
the n-epi region thickness (vertical direction in the figure)
should be increased. As depicted in the classical Eq. (1.3),
reducing the RDS(on) of a high voltage device requires greater
silicon area (A) to make up for the increased n-epi region.
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| Device designers have being challenged
to overcome the effects of the highly resistive n-epi region.
The solution comes through conductivity modulation . The n-epi
region is placed on the p+ substrate forming a pn-junction where
the conductivity modulation takes place. Because of its conductivity
modulation, the IGBT has much greater current density than the
power MOSFET . The forward voltage drop is also reduced. Due
to the presence of the p+ substrate in the IGBT, holes are injected
into the highly resistive n-epi and carrier overflow is created.
When the device turns off, these excessive carriers do not have
a current path to exit. Recombination is the only way to eliminate
the stored charge resulting from the buildup of excess carriers.
Additional recombination centers are formed by placing an n+
buffer layer between the n-epi and the p+ substrate. While the
n+ buffer layer may speed up the recombination, it also increases
the forward voltage drop of the device. Therefore, the tradeoff
between switching speed and conduction loss becomes a factor
in optimizing device performance. Additional benefits of the
n+ buffer layer include preventing a thermal runway and punch-through
of the depletion region. This allows the thin n-epi region to
be used which somewhat decreases the forward voltage drop. Now
the p+ substrate, the n-epi region and the p+ emitter part form
a pnp-transistor. |
| To maximize the performance of the IGBT, process
steps should be optimized to control the cell geometry, channel
length, actual doping distribution and so on. The possibility
of latch-up is reduced by the strategic processing of a device.
Geometry and doping levels are also optimized to reduce on-voltage,
switching speed and to achieve other key parametric variations.
Since the IGBT is a four-layer structure, it does not have an
inverse parallel diode inherent to power MOSFET. This is the
disadvantage for motor control designers who use the anti-parallel
diode to recover energy from the motor. Like the power MOSFET,
the IGBT gate is electrically isolated from the rest of a chip
by a thin silicon dioxide. The IGBT has a high input impedance
due to the isolated gate. It also exhibits the accompanying
advantages of the modest gate drive requirements and excellent
gate drive efficiency |
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| A more detailed operation of the
IGBT can be understood by referring to a cross section of the
device (Fig. 1.3) and an equivalent circuit (Fig. 1.4). The
equivalent circuit of the IGBT can be depicted quite accurately
by the pnp-transistor, where the base current is controlled
by a MOS transistor. The conductivity of the resistor on the
base part is increased (modulated) when the IGBT is turned on.
In this way, the greater portion of load current is flowing
over the base part. These effects will be seen by the turn-on
delay time and the tail current at the turn off. Figure 1.4
shows a complete equivalent circuit of the IGBT that includes
a parasitic npn-transistor formed by the n+ MOSFET source, the
p-type body region and the n-epi drift region. Current flowing
from the collector to emitter must pass through the pn-junction
formed by the p+ substrate and the n-epi region. For a fast
device, the n+ buffer layer is highly doped for recombination
and a speedy turnoff. The additional doping keeps the pnp gain
low. It allows two-thirds of the current to flow through the
base of the pnp (electron current ), while approximately one
third pass through the collector (hole current ). |
| Figure 1.4 also shows the lateral
resistance of the p-type body region. This parasitic resistance
is called spreading resistance Rshorting (or body region resistance
). Current flows through Rshorting can result in a voltage across
the base-emitter junction of the parasitic npn-transistor. If
the base-emitter voltage is above a certain threshold level,
the parasitic npn-transistor will begin to conduct. It causes
the npn and pnp transistors to enhance each other's current
flow and both devices can become saturated. Once this happens,
there is a high injection of electrons from the n+ region into
the p-type region and gate control is lost. This is known as
latch-up and it usually leads to device destruction. Device
processing directs currents within the device and keeps the
voltage across Rshorting low to avoid latching. The IGBT can
be gated off unlike a Silicon Controlled Rectifier (SCR). The
SCR has to wait for the current to cease allowing recombination
to take place in order to turn off. The IGBT offers an advantage
over the SCR by controlling the current within the device. When
the gate turns off, the internal MOSFET of the IGBT will stop
current flow and stored charges can only be dissipated through
recombination at that point. |
| The on-voltage of the IGBT is represented
by the sum of the following factors: the offset voltage of a
collector to the base junction in the pnp-transistor, the voltage
drops across the modulated resistance RMod (or drift region
resistance ) and the channel resistance of the internal MOSFET.
The forward voltage drops of the IGBT stay relatively unchanged
at increased temperatures. In the MOSFET, however, increased
temperature results in increased RDS(on) and increased forward
voltage drops. |
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